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Split microstrip connected with a matching SPICE load

This is a pair of microstrips, shown end-to-end to simplify the modeling and analysis. The left microstrip is excited with a pulse, and the right microstrip is terminated with a resistor load circuit. The microstrips are coupled via a matching impedance L-C network that is simulated as a SPICE circuit. The terminating load is also a SPICE circuit.

Run the simulation for 500 time steps. SPICE is automatically started when the simulation starts, and terminated when the simulation is terminated. he power moving on the microstrips can be seen with a +Z view of the model. The voltage at a point along the first microstrip is shown as an X-Y plot, and the voltage at all points along the two microstrips is also shown as an X-Y plot.

LC Model

VRML Model

Plot Files

VOLTAGE(P1).xy Voltage on the first strip
VOLTAGE(P2).xy Voltage on the second strip
source.xy Voltage near the source
sp.xy S-parameters of the model