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A PCB Via Model |
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LC ModelVRML Model |
Plot Files
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Only a small portion of the circuit board containing a single via will be analyzed, along with its associated pads and signal traces.
When a ground or power (solid metal) layer is created, a special techinque is used to propagate signals through the layer, rather than shorted to the layer. Relief (or isolation) pads are etched out of the metal for this purpose. The space left after removing the metal is eventually filled in with a prepreg material (sort of a circuit board glue).
Press Start, which will display a prompt dialog. Enter 3000 for the number of time steps, and press Ok.
Time-domain plot of the voltage measured on the input trace. The incident pulse is the first (70 volt!) peak, and the reflection returns from the via around 25 picoseconds.
Time-domain plot of the voltage measured on the output trace. This is the transmitted pulse, reduced from 70 to 50 volts after negotiating the via.
A start and end time step must be set for each pulse to define the time window. Note that time steps (integers) are used, rather than time in seconds. This is a hold-over from the good-old days, and may change in the future.
The pulses extracted from the probe data can be plotted with the Plot Pulses dialog of the Analysis menu.
Nearly all of the low frequency content of the incident pulse goes through the via, but much of the high frequency content is reflected.
Conveniently, the dialog assumes that the first pulse defined is the incident, the second is the reflected, and the third is the transmitted. Since we defined the pulses in that order earlier, then the defaults can be used. Also, since both the voltage and current data was saved by the probes, the power (V*I) can be used to calculate the S-parameters. If only the voltage or the current was available, V**2 or I**2 could be used.